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FPGA Digital Design Engineering Intern (May 2027) (4-16 months)

Kepler CommunicationsToronto, ON, Canada
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Posted on: 27 Sep 2026

Job Description

We invest heavily to deliver the best products to our customers, and so we’re on the hunt for a top-tier FPGA Digital Designer Engineer Intern. The RTL code you write will contribute to our new generation of satellites and earth stations.

Job Overview

Salary:
Not disclosed
JOB TYPE:
Not specified
Experience:
Not mentioned
Job Location:
Toronto, ON, Canada
Job Level:
Not specified
Education:
Graduation
FPGA Digital Design Engineering Intern (May 2027) (4-16 months)Kepler Communications