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Principal Design Engineer - IP Office

YammerCalifornia, USA, Mountain View, CA, USA +4 more
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Posted on: 28 Sep 2026

Job Description

Establish yourself as an integral member of AI SoC design team for the development of AI components with focus on best-in-class IP selection, QA and ensuring smooth integration in the SoCs. Identifying new value-adding, best-in-class IPs in the areas of PLL, DTS, Droop-Detector, HBM4,224 G Ethernet, GPIOs etc Facilitate selection of the most suitable IPs for targeted SoC landing-zones Architect robust process for IP release, update, QA, integration and pre/post silicon validations Track release and updates of the IPs and ensure appropriate integration Ensure quality of incoming IPs and facilitate smooth integrations by working closely with Logic design and Physical design teams. Interface with architecture, physical design (PD), design for test (DFT), and other teams to optimize tradeoffs within the design Provide technical leadership through mentorship and teamwork Established reputation in interactions with leading suppliers of IPs in 112G/224G class Ethernet, PCIe 5/6, HBM3/4 * Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. 10+ years of experience in interaction with major IP suppliers, IP selection, QA and Release process, Integration of IPs in major CPU, GPU or AI accelerator SoC's and close interactions with Major IP vendors and suppliers of SoCs

Job Overview

Salary:
Not disclosed
JOB TYPE:
Not specified
Experience:
Not mentioned
Job Location:
California, USA, Mountain View, CA, USA +4 more
Job Level:
Not specified
Education:
Graduation
Principal Design Engineer - IP OfficeYammer