Principal SoC Design Engineer

You will be part of the SOC design team driving many facets of high performance, high bandwidth AI accelerator designs. The tasks will include working on verification of Intellectual Property (IP) microarchitecture specification, Register Transfer Level (RTL) design, System on Chip (SOC) integration including clocking and resets, Synthesis and static checks such as Lint and Clock/Reset domain crossings. Throughout the program you will be interacting with various teams, including architecture, verification, and physical design, ensuring that the design is implemented and verified to the spec. Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience. 10+ years expertise in Verification of SoC complexes 8+ years of experience delivering successful IP or Application Specific Integrated Circuits (ASIC)/SOC designs. 8+ years of experience in Lint, CD/RDC, Smoke, Synthesis, Timing constraints, Power, Performance, Area (PPA) trade-offs and Post-Silicon Debug Experience with SoC Verification and Integration Experience with Clocking and reset Experience with Complex algorithmic designs for AI usages Experience with Script development.